When a signal coded in FM or MFM is received, then if the signal representing the binary data is to be extracted from it, a synchronous clock signal will have to be generated from this coded signal, thereby making it possible to create a window that assures that information representing one datum can be distinguished from other information in the coded signal. This clock signal is improperly called a data separator, and data separator circuits which enable the generation of this clock signal are also known. Nevertheless, in the state of the art these circuits require an oscillator of one certain frequency to function in the FM mode, and an oscillator of another, higher, frequency to function in the MFM mode. Thus the circuits in the state of the art use the datum itself to charge the counter that enables assuring the recovery of the clock signal. These devices have the disadvantage, in the event of variations in the magnitude of the signal, of causing variations in the period of the clock signal corresponding to the data that has undergone some variation. These variations may be on the order of plus or minus 20% and are equivalent to variations of plus or minus 5% in the instantaneous rotational speed for the overall system.